TSMC Transfers 32 U.S. Semiconductor Patents to Mago Barca IP

TSMC Transfers 32 U.S. Semiconductor Patents to Mago Barca IP
(Source: TSMC)

Taiwan Semiconductor Manufacturing Company (TSMC) transferred 32 U.S. semiconductor patents to Mago Barca IP on March 28, 2025. Mago Barca IP is an affiliate of Longhorn IP, a privately owned intellectual property management and patent portfolio licensing company.

The transferred patents cover technologies related to multi-layer integrated circuits, through-silicon vias (TSV), semiconductor contact structures, and packaging systems. 

The multi-layer integrated circuit and packaging patents describe methods for stacking multiple chips into a single integrated circuit, while optimizing the fabrication process. These technologies enhance device performance, reduce the footprint, and support more complex circuit configurations. Electrical connections between the stacked chips are typically enabled using bump technology, post-passivation interconnect structures, and interposers.

Through-silicon vias (TSVs) are essential for connecting chips in 3D integrated circuits. The patents related to TSVs address the formation and isolation techniques aimed at reducing noise, preventing shorting, and optimizing power and thermal management.

Additionally, the patent portfolio includes technologies related to FinFET body contact structures, packaging systems, contact structures, and source/drain contact spacers. These spacers improve contact reliability and reduce leakage current, contributing to the overall performance and efficiency of semiconductor devices.

Longhorn IP officially announced that its subsidiary, Mago Barca IP, acquired the patents from TSMC on March 28, 2025. Longhorn IP is known for its expertise in monetizing intellectual property through IP management and licensing.


▷Related Article: TSMC Targets Former Panasonic Patent With IPR Challenge (2025. 03. 28.)


The full list of U.S. patents acquired by Mago Barca IP from TSMC is available in the official records of the United States Patent and Trademark Office (USPTO).

Patent    Application    Invention title

8334170 12163464 METHOD FOR STACKING DEVICES

7825024 12277829 METHOD OF FORMING THROUGH-SILICON VIAS

8501587 12613408 Stacked Integrated Chips and Methods of Fabrication Thereof

7932608 12684859 THROUGH-SILICON VIA FORMED WITH A POST PASSIVATION INTERCONNECT STRUCTURE

8461647 12721045 SEMICONDUCTOR DEVICE HAVING MULTI-THICKNESS GATE DIELECTRIC

9048233 12787661 PACKAGE SYSTEMS HAVING INTERPOSERS

8581418 12840949 MULTI-DIE STACKING USING BUMPS WITH DIFFERENT SIZES

8674510 12846418 THREE-DIMENSIONAL INTEGRATED CIRCUIT STRUCTURE HAVING IMPROVED POWER AND THERMAL MANAGEMENT

8390125 13052258 THROUGH-SILICON VIA FORMED WITH A POST PASSIVATION INTERCONNECT STRUCTURE

8546953 13324405 THROUGH SILICON VIA (TSV) ISOLATION STRUCTURES FOR NOISE REDUCTION IN 3D INTEGRATED CIRCUIT

8735993 13363026 FINFET BODY CONTACT AND METHOD OF MAKING SAME

8772109 13659836 Apparatus and Method for Forming Semiconductor Contacts

9177914 13678155 METAL PAD STRUCTURE OVER TSV TO REDUCE SHORTING OF UPPER METAL LAYER

8669174 13732543 Multi-Die Stacking Using Bumps with Different Sizes

8816491 13958864 STACKED INTEGRATED CHIPS AND METHODS OF FABRICATION THEREOF

9305864 14024925 THROUGH SILICON VIA (TSV) ISOLATION STRUCTURES FOR NOISE REDUCTION IN 3D INTEGRATED CIRCUIT

9287170 14091508 CONTACT STRUCTURE AND FORMATION THEREOF

8928093 14203407 FinFET Body Contact and Method of Making Same

9190473 14307163 APPARATUS AND METHOD FOR FORMING SEMICONDUCTOR CONTACTS

9496189 14517627 Stacked Semiconductor Devices and Methods of Forming Same

9312384 14563720 FinFET Body Contact and Method of Making Same

9570324 14705555 METHOD OF MANUFACTURING PACKAGE SYSTEM

9530690 14931516 Metal Pad Structure Over TSV to Reduce Shorting of Upper Metal Layer

9647117 14942790 Apparatus and Method for Forming Semiconductor Contacts

9735107 15059652 CONTACT STRUCTURE AND FORMATION THEREOF

9984971 15391712 Methods of Forming Metal Pad Structures Over TSVS to Reduce Shorting of Upper Metal Layers

10515829 15425282 PACKAGE SYSTEM FOR INTEGRATED CIRCUITS

10510664 15675967 CONTACT STRUCTURE AND FORMATION THEREOF

10818543 16217676 Source/Drain Contact Spacers and Methods of Forming Same

11081372 16712184 PACKAGE SYSTEM FOR INTEGRATED CIRCUITS

11444028 16716441 CONTACT STRUCTURE AND FORMATION THEREOF

11410877 17078677 Source/Drain Contact Spacers and Methods of Forming Same


By PatenTrip



Comments